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      TL431 function pin diagram, TL431 the most complete information in Chinese
      Publish:Shenzhen Tergy Technology Co., Ltd.  Time:2016-10-25
      TL431 is a three terminal adjustable shunt reference voltage source with good thermal stability. Its output voltage can be arbitrarily set to any value from the Vref (2.5V) to the 36V range with two resistors. The typical dynamic impedance of the device is 0.2 ohms, you can use it instead of Zener diodes in many applications such as digital voltmeter, amplifier circuit, adjustable voltage power supply, switching power supply etc..
      Characteristic:
      Programmable output voltage is 36V
      Voltage reference error: + 0.4%, typical value @25 C (TL431B)
      Low dynamic output impedance, typical 0.22
      Load current capacity to 100mA 1.0mA
      Equivalent full range temperature coefficient 50 ppm/
      Temperature compensation operation full rated operating temperature range
      Low output noise voltage
      TO92 package pin diagram

                                 Figure 1 TO92 package pin diagram
      8 pin package pin function
                                  Figure 28 pin package pin function
      SOP-8 chip package pin diagram
                        Figure 3 SOP-8 patch package pin diagram
      TL431 symbol and internal block diagram

                            Figure 4 TL431 symbols and internal block diagram

      TL431 internal circuit diagram

                                                          Figure 5 TL431 internal circuit diagram

        MAXIMUM RATINGS (Full operating ambient temperature range applies, unlessotherwise noted.)
      最大額定值(環(huán)境溫度范圍適用,除非另有說(shuō)明。 )

      Rating 參數

      Symbol 符號

      數值

      Unit 單位

      Cathode to Anode Voltage陰極陽(yáng)極電壓

      VKA

      37

      V

      Cathode Current Range, Continuous 陰極電流范圍,連續

      IK

      –100 to +150

      mA

      Reference Input Current Range, Continuous 參考輸入電流范圍,連續

      Iref

      –0.05 to +10

      mA

      OperatingJunctionTemperature工作結溫

      TJ

      150

      Operating Ambient Temperature Range 操作環(huán)境溫度范圍

      TL431I,TL431AI, TL431BI TA

      –40 to +85

      TL431C, TL431AC, TL431BC  0 to +70

      StorageTemperature Range儲存溫度范圍

      Tstg

      –65 to +150

      Total Power Dissipation總耗散功率 常溫@ TA = 25℃ Derate above 25℃ Ambient Temperature

      D, LP后綴塑封 PD 0.70 W
      P后綴塑封 1.10
      DM 后綴塑封 0.52

      Total Power Dissipation @ TC = 25℃ Derate above 25℃ Case Temperature 總耗散功率 外殼溫度

      D, LP后綴塑封 PD

      1.5

      W
      P后綴塑封 3.0


        RECOMMENDED OPERATING CONDITIONS建議操作條件


        ELECTRICAL CHARACTERISTICS(TA=25℃, unless otherwise noted.)電氣特性(25℃ ,除非另有說(shuō)明。)


        ELECTRICAL CHARACTERISTICS (TA = 25℃, unless otherwise noted.)電氣特性(25℃,除非另有說(shuō)明。)


        圖6 測試電路VKA = Vref       圖7 測試電路VKA > Vref                       圖8  測試電路for Ioff
        Figure 6 test circuitVKA = Vref                   Figure 7test circuitVKA > Vref                                                       Figure 8test circuit  for Ioff

        Diagram:
      Diagram
                       Fig. 9 cathode current and cathode voltage                                        Fig. 10 cathode current and cathode voltage

      Reference input voltage and temperature diagram, reference input current and ambient temperature

         Fig. 11 reference input voltage and ambient temperature                  Fig. 12 reference input current and ambient temperature

      Variation of the reference input voltage with the cathode voltage, the off state cathode current with ambient temperature

         Fig. 13 variation of the reference input voltage with the cathode voltage      Figure 14 off state cathode current with ambient temperature

      Dynamic impedance and frequency, dynamic impedance with ambient temperature

               FIG. 15 dynamic impedance and frequency                                FIG. 16 dynamic impedance with ambient temperature

      Open loop voltage gain and frequency, spectral noise density

              Fig. 17 open loop voltage gain and frequency                                         Fig. 18 spectral noise density

      Impulse response, stable boundary conditions
                                      Fig. 19 impulse response                                            Figure 20 stability boundary conditions

        Application method:
      測試電路曲線(xiàn)a 邊界條件的穩定性 圖22曲線(xiàn)測試電路的B,C和D邊界條件的穩定性

      The stability of the B, C, and D boundary conditions of the test circuit for the stability diagram of the curve a boundary conditions are tested.Shunt regulator circuit diagram, large current shunt regulator circuit

           Fig. 23 circuit diagram of shunt regulator           Fig. 24 current shunt regulator circuitThree end fixed voltage stabilizing output circuit, series voltage regulation circuit, overvoltage protection circuit

      Figure 25 control three end fixed voltage stabilizing output circuit   Figure 26 series voltage regulation circuit     Fig. 27 overvoltage protection circuit
      Constant current source circuit, constant current source circuit, bidirectional thyristor overvoltage protection circuit

      Fig. 28 circuit of constant current source    Fig. 29 constant current source circuit    Fig. 30 bidirectional thyristor overvoltage protection circuitVoltage monitor circuit, single power supply comparison temperature compensation circuit

                  Fig. 31 voltage monitor circuit                 Fig. 32 comparison of single power supply and temperature compensation circuit

      Linear ohmmeter circuit, 400 MW phono amplifier circuit simple
                      Fig. 33 circuit diagram of linear ohm meter                   Figure 34 simple 400 MW phono amplifier circuit

      High efficiency buck switching converter circuit
                        Figure 35 high efficiency buck switching converter circuit

      Simplified TL431 device model

                                                                    Fig. 36 simplified TL431 device model

      Package diagram

                                                                       Figure 37 package diagram

      SOP-8 patch package
                             Figure 38 SOP-8 patch package

      Package diagram

                                                   Figure 39 package diagram

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